===== An Integrated Approach to TM on Multi-/Many-core =====


We currently participate in the [[http://www.velox-project.eu/|VELOX European Project]] that aims at providing an integrated Approach to Transactional Memory on Multi- and Many-core Computers. 
The general objective of Velox is to build an integrated hardware/software TM stack (i) to develop new and convert existing applications into real-world TM-based applications that scale easily with the number of cores,
(ii) to optimize software and hardware TM-mechanisms using real-world workloads, and (iii) to address unexpected but potential show stoppers for TM deployment.

Here are some of our contributions to the project:
  - [[elastic|Elastic transaction]], a new transaction model to design highly concurrent TMs;
  - [[stmbench7|STMBench7]], a realistic macro-benchmark based on OO7;
  - [[microbench|Microbench]], a micro-benchmarks suite to evaluate the performance of TM against lock-based and lock-free alternives on common data structures;
  - [[globulation2|Globulation2]], an existing application that we have parallelized using transactions.

==== Related Publications ====


Afek et al. (2010)
The VELOX Transactional Memory Stack
//IEEE Micro Special Issue - European Multicore Computing. IEEE MICRO 30(5):76-87. //

Gramoli, V., Guerraoui, R., Letia, M. (2010)
[[http://infoscience.epfl.ch/record/150438|Composition vs Concurrency]]
//2nd Workshop on the Theory of Transactional Memory (WTTM).//

Harmanci, D., Gramoli, V., Felber, P., Fetzer, C. (2010)
[[http://infoscience.epfl.ch/record/150437|Extensible Transactional Memory Testbed]]
//Journal of Parallel and Distributed Computing - Special Issue on Transactional Memory 70(2010)1053:1067  (JPDC).//

Dragojevic A., Felber P., Gramoli V., Guerraoui R. (2010)
[[http://infoscience.epfl.ch/record/144052|Why STM can be more than a Research Toy.]]
//Communications of the ACM (CACM).//

Gramoli, V., Harmanci, D., Felber, P. (2010)
[[http://infoscience.epfl.ch/record/139006|On the Input Acceptance of Transactional Memory]]
//Parallel Processing Letters 20(1)31:50 (PPL).//

Dragojevic, A. and Guerraoui, R. (2010)
[[http://infoscience.epfl.ch/record/148104|Predicting the Scalability of an STM: A Pragmatic Approach.]]
//5th ACM SIGPLAN Workshop on Transactional Computing (Transact).//

Barreto J., Dragojevic A., Ferreira P., Guerraoui R., Kapalka M. (2010)
[[http://infoscience.epfl.ch/record/144050|Leveraging Parallel Nesting in Transactional Memory.]]
//Proceedings of the 15th Symposium on Principles and Practice of Parallel Computing (PPoPP).//

Felber, P., Gramoli, V., Guerraoui, R. (2009)
[[http://infoscience.epfl.ch/record/140819|Elastic Transactions.]]
//Proceedings of the 23rd International Symposum on Distributed Computing (DISC).//

Dragojevic A., Guerraoui, R., and Kapalka, M. (2009)
[[http://infoscience.epfl.ch/record/136702|Stretching Transactional Memory.]]
//Proceedings of the ACM SIGPLAN 2009 Conference on Programming Languages Design and Implementation (PLDI).//

Harmanci, D., and Felber, P., Gramoli V. and Fetzer, C. (2009)
[[http://infoscience.epfl.ch/record/131219|TMunit: Testing Transactional Memories.]]
//4th ACM SIGPLAN Workshop on Transactional Computing (Transact).//

Gramoli, V., Harmanci, D. and Felber P. (2008)
[[http://infoscience.epfl.ch/record/128580|
Toward a Theory of Input Acceptance for Transactional Memories.]] 
//Proceedings of the 12th International Conference on Principles of Distributed Systems (OPODIS).//
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