TM2C

TM2C, is the first software Transactional Memory protocol for Many-Core systems. TM2C exploits network-on-chip communications to get granted accesses to shared data through efficient message passing. In particular, it allows visible read accesses and hence effective distributed contention management with eager conflict detection. TM2C comes with FairCM, a companion contention manager that ensures starvation-freedom, i.e., the eventual termination of every transactions.

TM2C has been ported to Intel's SCC, i386, x86_64, SPARC, and Tilera processors.

TM2C is now a part of the SSYNC synchronization suite.

Details

TM2C is the first transactional memory (TM) system tailored for non-coherent many-core processors. TM2C capitalizes the low latency of on-die message passing by being the first starvation-free distribute TM algorithm. To this end, TM2C exploits visible reads and allows the detection of conflict whenever a transaction attempts to override some data read by another transaction, hence anticipating the conflict resolution, otherwise deferred to the commit phase of the reading transaction. In contrast with many-cores, high latency systems require generally to pipeline asynchronous reads (inherently invisible) to achieve reasonable performance. Visible reads allow us to utilize contention management in a way similar to centralized TMs, yet fully decentralized, to provide starvation-freedom. TM2C comes with FairCM, a companion distributed contention manager that ensures the termination of every transaction and the fair usage of the TM system by each core.

We exploit the large amount of cores by assigning the transactional application and the DTM services of TM2C to different partitions of the cores so that no more than a single task is allocated per core. More precisely, two disjoint groups of cores run each of these two services, respectively. This decoupling benefits the communication load by limiting message exchanges between cores of distinct groups only.

For more details, refer to:

TM2C: a Software Transactional Memory for Many-Cores,
Vincent Gramoli, Rachid Guerraoui, Vasileios Trigonakis (alphabetical order),
EuroSys '12 - Proceedings of the 7th ACM European conference on Computer Systems

Code

You can get a copy of the source code of TM2C at: https://github.com/trigonak/tm2c