We have developed STMBench7: a benchmark for evaluating TM implementations. The benchmark aims at providing a workload that is both realistic and non-trivial to implement in a scalable way. The implementation (in Java and C++) contains a lock-based synchronization strategy that can serve as a baseline for comparison with various TMs.

The new Java version integrates with the VELOX stack: the code is parsed successfully using the TMJava precompiler and transactions are instrumented automatically using Deuce.

Apache Ant v1.8+ warnings have been fixed in v1.1 and remaining absolute path in the build.xml that were causing portability bugs have been fixed.

The former Java version (07.03.2008 Beta) of STMBench7 added the following changes from the previous version (27.06.2007):

1. Added correctness tests (useful for validating whether a given synchronization technique gives correct results):
   • Invariant tests: the implementation checks whether all the invariants of the benchmark data structure are preserved.
   • Sequential replay of a concurrent execution: the implementation can replay a concurrent execution sequentially in order to check for violations of the opacity property.
2. Since 07.03.2008 Beta version it does no longer use AspectJ: the coarse-grained and medium-grained locking methods are now fully implemented in Java, without adding any additional overhead when they are not used.
3. The build procedure now uses Apache Ant instead of make.

Note that the new version of the benchmark has a slightly different API. The new API is cleaner and easier to use with an STM, but may introduce problems when used with implementations using the old version of STMBench7.

1. New version (25.02.2011):
   • v1.2: stmbench7_java-v1.2.tgz
2. Old versions:
   • (07.03.2008 beta) source code and JAR binary file: stmbench7-07.03.2008-beta.tgz
   • (21.02.2007) source code: stmbench7-21.02.2007.tgz
   • (21.02.2007) JAR binary file: stmbench7-21.02.2007.jar

The following files are available for download:

• Latest STMBench7-SwissTM code: sb7-20110815.
• SwissTM (previous version), TinySTM and TL2 STMBench7 source code: sb7_tt_20090910.tgz

Stripped down version that works with multiple platforms:

• sb7_c++_20110302 working with gcc, DTMC, PTLSim-ASF/HyTM/HTM from VELOX.

Older versions:

• Source code (with locking and RSTM-based synchronization): stmbench7.cpp-27.06.2007.tgz
• A patch for RSTM that is needed to run the RSTM version of STMBench7: rstm_v3.epfl.2.tgz
• SwissTM-w, TinySTM and TinySTM STMBench7 source code: sb7_tt_20081117.tgz
• SwissTM-o STMBench7 source code: sb7_swisstm_20080825.tgz
• TL2/TinySTM source code: sb7_tt_20080519.tgz

The C++ version of STMBench7 is created/maintained by Aleksandar Dragojevic.

Dragojevic A., Felber P., Gramoli V., Guerraoui R. (2011) Why STM can be more than a Research Toy. Communications of the ACM (CACM).

Afek et al. (2010) The VELOX Transactional Memory Stack. IEEE Micro Special Issue - European Multicore Computing. IEEE MICRO 30(5):76-87.

Dragojevic, A., Guerraoui, R. and Kapalka, M. (2008) Dividing Transactional Memories by Zero. 3rd ACM SIGPLAN Workshop on Transactional Computing (Transact 2008).

Guerraoui, R., Kapalka, M. and Vitek, J. (2007) STMBench7: A Benchmark for Software Transactional Memory. EuroSys.